Semiconductor devices are used in a variety of electronic applications, such as personal computers, cell phones, digital cameras, and other electronic equipment, as examples. The semiconductor industry continues to improve the integration density of various electronic components (e.g., transistors, diodes, resistors, capacitors, etc.) by continual reductions in minimum feature size, which allow more components to be integrated into a given area. These smaller electronic components also require smaller packages that utilize less area than packages of the past, in some applications.
One type of smaller packaging for semiconductor devices that has been developed is wafer level packaging (WLPs), in which integrated circuit die are packaged in packages that typically include a redistribution layer (RDL) that is used to fan out wiring for contact pads of the integrated circuit die so that electrical contact can be made on a larger pitch than contact pads of the die. Throughout this description, the term die is used to refer to both the singular and the plural.
When die are positioned on carrier wafers of WLPs and a molding compound is formed over the die, movement of the die can occur, which is undesirable. Die movement that is often evident as die rotation or die shifting may cause problems aligning subsequently formed material layers of the WLPs, such as the RDL, particularly in multi-chip packages in which two or more die are packaged together in a single package. Such die movement in package formation results in reduced yields.
Thus, what are needed in the art are improved packaging designs for semiconductor devices.
Corresponding numerals and symbols in the different figures generally refer to corresponding parts unless otherwise indicated. The figures are drawn to clearly illustrate the relevant aspects of the embodiments and are not necessarily drawn to scale.